The present invention relates to a three-dimensional (3D) graphics processor and its drafting method using parallel scanning lines as processing unit. By the use of a horizontal scanning line or a plurality of horizontal scanning lines, it can omit the common frame and Z-registor. Moreover, it can share data base memory with 2D sprite which not only can speed up the 3D drafting but also can achieve the object of integrating the multimedia apparatuses as well as simplifying the design process.
Following the advances in information industry, the common users of computer are no more in pursuit of the simple word processing or graphic display in 2D as in the early days, rather, they ask for the multimedia pictorial images in 3D simulating-the real situation to be shown in the computer display, that is, they are in pursuit of the target of picturesque presentation having relatively delicate and real stereoscopic sense. To meet the foregoing requirements, the 3D graphics technology plays the role as the medium between the computer and the real situation. The 3D graphics technology is not only applicable to the simulation of the real world in advance, it can also be employed to visualize in science, to have more esthetic sense in entertainment, as well as to be animated in product design. All of these applications show the shake up effect brought forth by the 3D graphics technology. Therefore, all the developed countries without exception take the 3D graphics technology as the star industry of the next century.
In general, the pictorial display of 3D graphics is achieved by the use of a 3D graphics processor. However, the way of processing of the 3D graphics processor of the prior art, as shown in FIG. 1, consists of two stages, i.e. the geometry engine stage and the rendering stage wherein the geometry engine stage mainly makes use of the CPU 11 to take the triangle data in the main memory 12 via a system bus 13 to perform calculation by using a frame as a processing unit, in other word, to transform the 3D stereoscopic spatial coordinate data into pixel data and to manage all the polygonal disposition including the specific attributes such as color, shadow, and stripe and so on. As there are a great amount of mathematical calculation which needs to be accom-plished by making use of the floating point unit of the CPU 11 in this stage, the data calculation and transmission of the CPU 11 are apt to be delayed. Consequently, the drafting speed of the stereo-scopic graphics will be affected.
The rendering stage mainly provides the stereoscopic and dynamic process which should be manifested when the actual pixels are shown in the 2D display device. Moreover, it receives the pixel data unloaded from the CPU 11, transforms the pixel data into the images which are to be shown eventually onto the display device 19 by means of the drafting chip set 20 constituted by a memory controller 22, a data buffer 24, a graphics controller 26, time sequence generator 28, and CRT-controller 29. It can also stores the images in a frame buffer 14 and a Z-buffer which can show the far-and-near distance of an object. It further shows the stereoscopic image onto the display device 19 in cooperation with the functions of a color palette controller 15, a color palette memory 155, vision encoder 17 and a synchronized signal generator 175 of the display device 175.
Since the 3D graphics processor uses a frame as an unit to process and calculate the 3D triangle elements, the processor increases their corresponding variables in advance, thereby, the accommodating memory space required by the frame buffer 14 and Z-buffer 16 shouldn""t be too small. Take a pixel display device having 16 bit and 256xc3x97256 bits of resolution for example, the memory space of the frame buffer 14 should not be smaller than 256 k-byte while that of the Z-buffer 16 should not be smaller than 128 k-byte, otherwise it will cause trouble in image display. However, to the consumable style of electronic industry, such a big space of memory (SRAM) is too high in the proportion of cost expenditure, thereby, it is very hard to be popularized and used by the users.
What is more, the 3D graphics processors of the prior art are not able to share memories with the 2D sprite calculating device, thereby, it is hard to achieve the object of the sharing and integrating of resources. In this way, the designers, besides paying attention to the concept of software by transforming the great amount of calculation consumed by the software into hardware to reduce the amount of software calculation so as to speed up the processing work (the floating calculation process of CPU), they need also to think of the problems of the hardware coordination between the 3D and 2D graphics, thereby, there are design difficulties to some extent.
Therefore, it has been an ardent anticipation for the users and the present inventor to design a kind of three-dimensional graphics processor and its drafting method intending to effectively resolve the memory space problems of the frame buffer and the Z-buffer and further to speed up the graphics processing speed so as to achieve the object of sharing and integrating the resource of 2D and 3D graphics.
The main objective of the present invention is to provide a three-dimensional drafting method of graphics using parallel scanning lines instead of the conventional way of using frames as processing unit. It instantly calculates the pixels required to display the images and directly stores in the pixel buffer. It then accommorate the synchronized signal display of the display device to display their stereoscopic images, thereby, it not only can greatly save the amount of memory used in the frame buffer and Z-buffer, but also can reduce the cost expense.
The next objective of the present invention is to provide a three-dimensional drafting method of graphics using parallel scanning lines as processing unit wherein all the triangle elements are transfered to store in a data base memory without going through the calculation of the CPU, therefore, it will speed up the drafting speed of the 3D graphics without delay caused by the data calculation and transmission of the CPU.
The other objective of the present invention is to provide a three-dimensional drafting method of graphics using parallel scanning lines as processing unit wherein it makes use of the pipe-line operation method to calculate and process the work in the geometry engine stage and rendering stage of the triangle elements in order to bring its hardware function into full play so as to speed up the drafting of the graphics.
Another objective of the present invention is to provide a three-dimensional graphics processor using parallel scanning lines as processing unit wherein its data base memory can store sprites of 2D graphics and triangles of 3D graphics respectively in order to achieve the object of the integration of both and sharing resources.
One other objective of the present invention is to provide a three-dimensional graphics processor using parallel scanning lines as processing unit wherein the data base memory of the graphics processor can be built in a single chip together with the CPU in order to simplify the design and the manufacturing process.